The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 18, 2004

Filed:

Sep. 14, 2000
Applicant:
Inventors:

Theodore W. Houston, Richardson, TX (US);

Keith A. Joyner, Richardson, TX (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/14763 ; H01L 2/144 ; H01L 2/1302 ;
U.S. Cl.
CPC ...
H01L 2/14763 ; H01L 2/144 ; H01L 2/1302 ;
Abstract

A semiconductor device and a method for making it involve the semiconductor device ( ) having a substrate ( ) with spaced source and drain regions ( ). A gate section ( ) projects upwardly from between an adjacent pair of these regions, into an insulating layer ( ). In order to create local interconnects to the source and drain regions through the insulating layer, a patterned etch is carried out using an etch region ( ), which extends over one of the gate sections from a location above one of the regions to a location above another of the regions. Etching in this etch region produces recesses ( ) on opposite sides of and immediately adjacent the gate section. A conductive layer ( ) is deposited to fill the recesses, and then is planarized back to the upper ends of the gate sections. The portion of the conductive material remaining in each recess is self-aligned to be immediately adjacent at least one gate section, and serves as a local interconnect for a respective source or drain region.


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