The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 18, 2004
Filed:
Nov. 21, 2002
Renesas Technology Corp., Tokyo, JP;
Abstract
A method of manufacturing a semiconductor device is obtained which is capable of evading generation of a short circuit between wirings in an upper wiring layer even if a part of an upper surface of an FSG film is exposed by variations in a production step. After a USG film ( ) is deposited to a thickness of 1 &mgr;m over an entire surface of an FSG film ( ), the USG film ( ) is polished and removed by a thickness of 900 nm from an upper surface thereof by the CMP method. At this time, a part of an upper surface of the FSG film ( ) is exposed by variations in a production step. Next, the surface of the interlayer dielectric film ( ) is cleaned with a cleaning liquid whose etching rate to the FSG film ( ) and etching rate to the USG film ( ) are substantially the same. Such a cleaning liquid may be, for example, an ammonia hydrogen peroxide mixture of NH OH:H O :H O=1:1:20. The structure shown in FIG. is dipped in the above-mentioned ammonia hydrogen peroxide mixture for 60 seconds to clean the surface of the interlayer dielectric film ( ).