The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 18, 2004

Filed:

Sep. 26, 2001
Applicant:
Inventors:

John Desko, Wescosville, PA (US);

Chung-Ming Hsieh, Wyomissing, PA (US);

Bailey Jones, Mohnton, PA (US);

Thomas J. Krutsick, Fleetwood, PA (US);

Brian Thompson, Sinking Spring, PA (US);

Steve Wallace, Fleetwood, PA (US);

Assignee:

Agere Systems Inc., Allentown, PA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/972 ;
U.S. Cl.
CPC ...
H01L 2/972 ;
Abstract

The present invention provides a semiconductor device, a method of manufacture therefor, and an integrated circuit including the semiconductor device. The semiconductor device may include a well doped with a P-type dopant located over a semiconductor substrate. The semiconductor device may further include a buried layer including the P-type dopant located between the well and the semiconductor substrate, and a gate located over the well.


Find Patent Forward Citations

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Desko, John. (2004). Semiconductor device having a buried layer for reducing latchup and a method of manufacture therefor (U.S. Patent No. 6737311). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6737311

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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