The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6734481 B1

PDF
Full Text
Expired
Date of Patent:
May. 11, 2004

Filed:

Apr. 16, 2002
Applicant:
Inventor:

Masahiko Takeuchi, Hyogo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/7108 ; H01L 2/358 ;
U.S. Cl.
CPC ...
H01L 2/7108 ; H01L 2/358 ;
Abstract

Lead interconnection layers and are electrically connected to the respective source and drain regions of a pair of a monitor transistor MT. Lead interconnection layers and are both formed on same insulating layer and on same insulating layer as is a bit line conductive layer of a memory cell area. Furthermore, lead interconnection layers and have respective contact sections each with a large width and to each of which a needle of a probe can be connected externally. With such a structure adopted, there can be obtained a semiconductor device capable of monitoring a transistor characteristic correctly and easily by reducing parasitic resistance, further, at an early stage in a wafer process; and a fabrication process therefor.


Find Patent Forward Citations

Takeuchi, Masahiko. (2004). Semiconductor device having a monitor pattern (U.S. Patent No. 6734481). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6734481

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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