The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 04, 2004

Filed:

Apr. 26, 2001
Applicant:
Inventors:

Nicolas J. Camilleri, Santa Cruz, CA (US);

Edward S. McGettigan, San Jose, CA (US);

Kenneth J. Stickney, Jr., Boulder, CO (US);

Jeffrey V. Lindholm, Longmont, CO (US);

Kevin L. Bixler, Littleton, CO (US);

Raymond Kong, San Francisco, CA (US);

Assignee:

Xilinx, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/750 ; H03K 1/7693 ;
U.S. Cl.
CPC ...
G06F 1/750 ; H03K 1/7693 ;
Abstract

A clock template includes digital programming information for programming clock frames of a programmable gate array (PGA). The digital programming information represents a number of different clock configurations that correspond to various designs in the PGA. In one embodiment, the digital programming information includes a bit stream for partially reconfiguring the PGA. In another embodiment, the digital programming information is embedded in digital programming information of at least one of the designs. Methods of configuring a PGA with different designs having different clocking configurations by utilizing the clock template are also disclosed.


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