The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 04, 2004
Filed:
Dec. 08, 2000
Razak Hossain, San Diego, CA (US);
STMicroelectronics, Inc., Carrollton, TX (US);
Abstract
There is disclosed a circuit for determining the number of Logic 1 bits in a group of N data bits. The circuit comprises: 1) an input stage of 4:3 carry-save adders, each of the 4:3 carry-save adders receiving four of the N data bits on four input lines and generating three sum bits (S , S , S ) equal to a total number of Logic 1 bits on the four input lines, wherein the three sum bits have bit weights of S =4, S =2 and S =1, respectively; 2) a first intermediate stage of 4:2 carry-save adders, each of the first intermediate stage 4:2 carry-save adders having four input lines for receiving selected ones of the S sum bits, the S sum bits, and the S sum bits and generating therefrom a carry-out (COUT) bit, a carry (C) bit and a sum (S) bit; and 3) a carry-propagate adder having a first input channel and a second input channel coupled to the first intermediate stage 4:2 carry-save adders and capable of generating a binary result equal to a total number of Logic 1 bits in the group of N data bits.