The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 06, 2004

Filed:

May. 02, 2000
Applicant:
Inventors:

Laurent Wojcieszak, Meylan, FR;

Sonia Ferrante, Grenoble, FR;

Assignee:

STMicroelectronics S.A., Gentilly, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/200 ; G06F 1/300 ;
U.S. Cl.
CPC ...
G06F 1/200 ; G06F 1/300 ;
Abstract

A storage array is described which is specifically adapted to support a specific set of instruction modes of a processor. A first set of storage cells have a write input and a single read output. Second and third sets of storage cells each have a write input and only two read outputs. A fourth set of storage cells each have a write input and only three outputs. All the write inputs are addressable in common by a single write address and the read outputs are individually selectable responsive to a read pointer.


Find Patent Forward Citations

Wojcieszak, Laurent. (2004). Storage array supporting a plurality of instruction modes (U.S. Patent No. 6718452). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6718452

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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