The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 06, 2004
Filed:
Sep. 19, 2002
Abstract
A new semiconductor packaging technology is proposed for the fabrication of a thermally-enhanced stacked-die BGA (Ball Grid Array) semiconductor package. By the proposed semiconductor packaging technology, a substrate is used as a chip carrier for the mounting of two semiconductor chips in conjunction with a heat spreader thereon, wherein the first semiconductor chip is mounted over the substrate through flip-chip (FC) technology; the heat spreader is mounted over the first semiconductor chip and supported on the substrate; and the second semiconductor chip is mounted on the heat spreader and electrically coupled to the substrate through wire-bonding (WB) technology. To facilitate the wire-bonding process, the heat spreader is formed with a plurality of wire-routing openings to allow the bonding wires to be routed therethrough. Since chip-produced heat during operation can be dissipated through the heat spreader, it allows an enhanced heat-dissipation efficiency. In addition, the heat spreader can serve as a grounding plane to the package chips, so that the packaged chips would have better electrical performance during operation.