The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 30, 2004
Filed:
Nov. 02, 2000
Applicant:
Inventor:
Srithar Ramesh, Portland, OR (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03H 5/12 ; H04B 3/26 ;
U.S. Cl.
CPC ...
H03H 5/12 ; H04B 3/26 ;
Abstract
A circuit for removing noise from the power supply of a clock generator. Switching regulator noise from the voltage regulator section can affect a clock chip when it is carried through the power plane or ground plane. In order to remove this, a ferrite bead is placed along the voltage supply line. A bulk capacitor with low equivalent series resistance is connected from the output side of the ferrite bead to ground. By properly selecting the size of the bead and capacitor, the noise is reduced. The result is that the clock does not drift so that functional failures are reduced.