The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 30, 2004
Filed:
Mar. 18, 2003
Ryuji Kohno, Chiyoda, JP;
Hideo Miura, Koshigaya, JP;
Yoshishige Endo, Tsuchiura, JP;
Masatoshi Kanamaru, Miho, JP;
Atsushi Hosogane, Iwama, JP;
Hideyuki Aoki, Takasaki, JP;
Naoto Ban, Sagamihara, JP;
Hitachi, Ltd., Tokyo, JP;
Abstract
A semiconductor inspection apparatus which is possible to inspect a plurality of semiconductor devices collectively at one time, which has conventionally been difficult because of precision or the like of probes. A method of manufacturing the semiconductor inspection apparatus comprises the steps of forming a cover film on a surface of the silicon substrate and forming a plurality of probes of a polygonal cone shape or a circular cone shape through etching after patterning by photolithography, after the cover film is removed, again forming a cover film on the surface of the silicon substrate and forming a beam or a diaphragm for each probe through etching after patterning by photolithography, after the cover film is removed, again forming a cover film on the surface of the silicon substrate and forming a through hole corresponding to the probe through etching after patterning by photolithography, and after the cover film is removed, forming an insulating film on the surface of the silicon substrate, forming a metal film on a surface of the insulating film, and forming a wiring lead through etching after patterning by photolithography.