The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 23, 2004

Filed:

Jun. 27, 2002
Applicant:
Inventors:

David R. Friedman, Menlo Park, CA (US);

J. James Tringali, Los Altos, CA (US);

Roy E. Scheuerlein, Cupertino, CA (US);

James E. Schneider, Palo Alto, CA (US);

Christopher S. Moore, San Jose, CA (US);

Daniel C. Steere, Menlo Park, CA (US);

Assignee:

Matrix Semiconductor, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/02 ;
U.S. Cl.
CPC ...
G11C 5/02 ;
Abstract

The preferred embodiments described herein provide a three-dimensional memory cache system. In one preferred embodiment, a modular memory device removably connectable to a host device is provided. The modular memory device comprises a substrate, a cache memory array, a three-dimensional primary memory array, and a modular housing. The cache memory array and the three-dimensional primary memory array can be on the same or separate substrates in the modular housing. In another preferred embodiment, an integrated circuit is provided comprising a substrate, a cache memory array in the substrate, and a three-dimensional primary memory array above the substrate. Other preferred embodiments are provided, and each of the preferred embodiments can be used alone or in combination with one another.


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