The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 16, 2004
Filed:
Sep. 15, 2000
Akifumi Tsukimori, Kwasaki, JP;
Ikuya Kawasaki, Kodaira, JP;
Shinichi Yoshioka, Tokyo, JP;
Koki Noguchi, Tokyo, JP;
Renesas Technology Corporation, Tokyo, JP;
Abstract
A semiconductor device including a port circuit ( ) connected to an internal circuit, external terminals to which the port circuit is connected and a boundary scanning circuit ( ), the boundary scanning circuit being the one that makes access to the external terminals through the test access terminals. The test access terminals are also used as predetermined external terminals among the external terminals. Selection means ( to ) are provided for selectively determining whether the multi-use terminals (P to P ) be connected to the port circuit or to the boundary scanning circuit, and for selecting, as an initial state, the state where the multi-use terminals are connected to the boundary scanning circuit in response to the power-on reset. Since the test access terminals need not be dedicated, the boundary scanning function can be furnished while guaranteeing pin compatibility of external terminals. When the boundary scanning function is not utilized or when the port function of the multi-use terminals is not used despite of using the boundary scanning function, complete compatibility is guaranteed for the semiconductor device which is not furnished with the boundary scanning function.