The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 16, 2004
Filed:
Nov. 05, 2002
Robi Banerjee, Gresham, OR (US);
Derryl J. Allman, Camas, WA (US);
David T. Price, Gresham, OR (US);
LSI Logic Corporation, Milpitas, CA (US);
Abstract
A semiconductor device wherein some parts of a circuit are disposed on Si—Ge regions and others are implemented in Silicon substrate regions of the chip. The Si—Ge region provides that carrier flow is forced to the surface channel region which helps reduce short channel effects. A method of making such a semiconductor device is also provided and includes steps of forming a thermal oxide layer on a Silicon substrate, masking at least a portion of the thermal oxide layer, removing at least a portion of the thermal oxide layer in order to expose a portion of the Silicon substrate, epitaxially growing an Si—Ge layer on the exposed portion of the Silicon substrate, epitaxially growing a Silicon layer on the Si—Ge layer, and continuing manufacture of the device by forming a circuit on the Si—Ge regions and non-Si—Ge regions of the semiconductor device.