The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 16, 2004

Filed:

Mar. 20, 2003
Applicant:
Inventors:

Michael Sadd, Austin, TX (US);

Bruce E. White, Round Rock, TX (US);

Craig T. Swift, Austin, TX (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/18247 ;
U.S. Cl.
CPC ...
H01L 2/18247 ;
Abstract

A multi-bit non-volatile memory device includes a charge storage layer ( ) sandwiched between two insulating layers ( and ) formed on a semiconductor substrate ( ). A thick oxide layer ( ) is formed over the charge storage layer ( ) and a minimum feature sized hole is etched in the thick oxide layer ( ). An opening is formed in the thick oxide layer ( ). Side-wall spacers ( ) formed on the inside wall of the hole over the charge storage layer have a void ( ) between them that is less than the minimum feature size. The side-wall spacers ( ) function to mask portions of the charge storage layer ( ), when the charge storage layer is etched away, to form the two separate charge storage regions ( and ) under the side-wall spacers ( ). The device can be manufactured using only one mask step. Separating the charge storage regions prevents lateral conduction of charge in the nitride.


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