The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6704231 B1

PDF
Full Text
Expired
Date of Patent:
Mar. 09, 2004

Filed:

Mar. 27, 2003
Applicant:
Inventors:

Fukashi Morishita, Hyogo, JP;

Mitsuya Kinoshita, Hyogo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 ;
U.S. Cl.
CPC ...
G11C 7/00 ;
Abstract

A semiconductor memory device includes an isolation unit isolating a bit line in a first region including a memory cell formed of a thick film transistor and a second region including a sense amplifier formed of a thin film transistor. Voltage supply lines are provided corresponding to respective regions. In a test mode, the isolation unit isolates the two regions. A voltage for testing is supplied from the voltage supply line. Thus, a voltage for testing corresponding to a thick film transistor and a thin film transistor can be supplied to allow efficient execution of a burn-in test.


Find Patent Forward Citations

Morishita, Fukashi. (2004). Semiconductor memory device with circuit executing burn-in testing (U.S. Patent No. 6704231). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6704231

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