The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 02, 2004
Filed:
Oct. 30, 2002
Joseph J. Nahas, Austin, TX (US);
Thomas W. Andre, Austin, TX (US);
Bradley J. Garni, Austin, TX (US);
Motorola, Inc., Schaumburg, IL (US);
Abstract
In a memory, a bias circuit ( ) uses a current reference ( ) for providing a reference current and control circuitry ( ) to bias a sense amplifier ( ) with a varying voltage (V ). The varying voltage maintains current through MRAM bit cells ( ) at a value proportional to the reference current over variations in average bit cell resistance with immunity to variations in process, supply voltage and temperature. In one form, a mock sense amplifier ( ) and mock array of bit cells ( ) are used to establish internal steady state voltages equivalent to a steady state condition of the sense amplifier with equalized outputs and to generate the varying bias voltage. Matching diode-connected transistors in each of the control circuitry and either the mock sense amplifier or the sense amplifier is used to generate the varying bias voltage.