The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 02, 2004
Filed:
Mar. 26, 2003
Chong Jen Hwang, Sanchung, TW;
Macronix International Co., Ltd., Hsinchu, TW;
Abstract
A process uses two layers of polysilicon for fabricating high-density nonvolatile memory, such as mask ROM or SONOS memory, integrated with advanced peripheral logic on a single chip. The method includes covering a gate dielectric layer with a sacrificial layer of silicon nitride; using a masks for defining line structures in the layer of silicon nitride for the bit line implant processes; depositing a dielectric material among the line structures to fill gaps among the line structures; planarizing the deposited oxide and said layer of silicon nitride; removing the silicon nitride and applying a layer of polysilicon material; patterning wordlines in the array portion, and transistor gate structures in said non-array portion, and applying LDD, silicide and other logic circuit processes.