The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 17, 2004

Filed:

Dec. 13, 2002
Applicant:
Inventors:

Thomas M. Maffitt, Burlington, VT (US);

Russell J. Houghton, Essex Junction, VT (US);

Mark David Jacunski, Colchester, VT (US);

William Robert Tonti, Essex Junction, VT (US);

Kevin McStay, Hopewell Junction, NY (US);

Assignee:

Other;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 8/00 ;
U.S. Cl.
CPC ...
G11C 8/00 ;
Abstract

An apparatus and method for wordline voltage compensation in integrated memories is provided, where the apparatus includes an array threshold voltage (“V ”) monitor, a wordline on voltage (“V ”) generator in signal communication with the threshold voltage monitor for providing a wordline on voltage responsive to a change in the monitored array threshold voltage, and a wordline off voltage (“V ”) generator in signal communication with the threshold voltage monitor for providing a wordline off voltage responsive to a change in the monitored array threshold voltage; and where the corresponding method for compensating each of a wordline on signal and a wordline off signal in correspondence with an array threshold signal includes monitoring an array threshold signal, generating a wordline on signal responsive to the monitored array threshold signal, and generating a wordline off signal responsive to the monitored array threshold signal.


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