The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6686763 B1

PDF
Full Text
Expired
Date of Patent:
Feb. 03, 2004

Filed:

May. 16, 2002
Applicant:
Inventor:

Yao Tung Yen, Cupertino, CA (US);

Assignee:

Pericam Semiconductor Corp., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 1/9003 ;
U.S. Cl.
CPC ...
H03K 1/9003 ;
Abstract

A transmission line is terminated by a buffer. The buffer isolates a load from the transmission line using a transmission gate. The transmission gate is turned off and does not conduct most of the time, but turns on when a transition is detected on the transmission line, allowing the transmission line to directly drive the load for a short time. Once the load is switched beyond a logic threshold voltage, the transmission gate is again turned off and a latch or latching transistors driven by the transmission line continue to drive the isolated load to power or ground voltages. Driver transistors are also enabled when the transmission gate is turned on, driving either the output (load) node or the input (transmission line) node with the new data. Feedback from the output node disables the transmission gate and driver transistors once the output has been driven past the logic threshold.


Find Patent Forward Citations

Loading…