The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 20, 2004
Filed:
Oct. 24, 2001
Masanori Minamio, Takatsuki, JP;
Hiroaki Fujimoto, Hirakata, JP;
Ryuichi Sahara, Hirakata, JP;
Toshiyuki Fukuda, Kyoto, JP;
Toru Nomura, Amagasaki, JP;
Matsushita Electric Industrial Co., Ltd., Osaka, JP;
Abstract
A semiconductor device includes: a wiring substrate; a wiring electrode; a semiconductor chip; a connecting member; and a resin encapsulant. The wiring electrode is formed on the wiring substrate. The semiconductor chip is mounted on the wiring substrate and a second bottom face of the semiconductor chip is in contact with the wiring substrate. An electrode pad formed on the semiconductor chip and the wiring electrode are electrically connected to each other with the connecting member. The semiconductor chip, the wiring electrode, and the connecting member, for example, are molded with the resin encapsulant on the upper surface of the wiring substrate. A level difference exists between a first bottom face and the second bottom face of the semiconductor chip. The first and second bottom faces are respectively located at a peripheral portion and a central portion of the semiconductor chip. A part of the resin encapsulant is interposed between the first bottom face and the upper surface of the wiring substrate. Thus, the resin encapsulant and the semiconductor chip are secured more strongly to each other, and so are the resin encapsulant and the wiring substrate.