The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 06, 2004
Filed:
Jan. 04, 2002
Applicant:
Inventors:
Ta-Lee Yu, Hsinchu, TW;
Jian-Hsing Lee, Hsi-Chu, TW;
Assignee:
Taiwan Semiconductor Manufacturing Company, Hsin-chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02H 3/22 ;
U.S. Cl.
CPC ...
H02H 3/22 ;
Abstract
This invention provides a circuit and a method for protecting electronic circuits from electrostatic damage ESD. The invention teaches a dynamic floating silicon-controlled rectifier SCR for use as an ESD clamp. The n-well of the SCR is biased to the supply voltage Vdd under normal conditions to provide good latch-up performance. During ESD events, the n-well is floated to improve clamping performance. In addition, this invention utilizes a floating-well control circuit which provides better latch-up immunity during normal operation after the ESD event has passed.