The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 30, 2003

Filed:

Nov. 08, 2000
Applicant:
Inventors:

Chi-Yeu Chao, Portland, OR (US);

Tawfik R. Arabi, Tigard, OR (US);

Thomas D. Barrett, Hillsboro, OR (US);

Gregory F. Taylor, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/100 ;
U.S. Cl.
CPC ...
G06F 1/100 ;
Abstract

An integrated circuit includes circuitry to test input/output (I/O) devices. Test data is provided to a loopback circuit that drives data through the output buffer to the pad, and back onto the integrated circuit through the input buffer. Separate clock signals, with varying phase, are generated for input synchronous elements and output synchronous elements. The phase, and the relative time delay between the separate clocks, changes as an external clock is varied. The external clock is varied to verify the performance parameters of the I/O devices. Each I/O device includes a shift register that can be coupled to the other buffers in a chain, or can be configured to be in a loop.


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