The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 23, 2003
Filed:
Mar. 25, 1997
Donald George Mikan, Jr., Austin, TX (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A domino logic circuit has a beta controllable noise margin and an ability to hold an evaluated state until a received clock signal goes to a low state by adding an additional N-channel field effect transistor (NFET) in series with another N-channel field effect transistor, where both of these devices receive the date input signal. Additionally, a P-channel field effect transistor (PFET) also receives the data input signal into its gate electrode. This P-channel field effect transistor is positioned so that it opposes one of the N-channel field effect transistors. The advantages gained by this additional circuitry may also be implemented within a multiplexer circuit.