The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 16, 2003

Filed:

Jun. 01, 2001
Applicant:
Inventors:

Norio Kimura, Kanagawa, JP;

Tatsuya Kohama, Kanagawa, JP;

Assignee:

Ebara Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B24B 7/19 ;
U.S. Cl.
CPC ...
B24B 7/19 ;
Abstract

A semiconductor substrate having a Cu layer formed so as to fill wiring grooves formed in the substrate surface and to cover regions of the substrate surface where no wiring groove is formed is brought into sliding contact with a polishing surface on a turntable to carry out polishing until the Cu layer is polished to a predetermined thickness. Then, the semiconductor substrate is brought into sliding contact with a polishing surface on a turntable to carry out polishing until the Cu layer on the substrate surface is removed, except for portions of the Cu layer formed to fill the wiring grooves, and a barrier metal layer is also removed. Thus, the Cu layer on the substrate surface can be removed uniformly, and the Cu wiring portions formed in the wiring grooves can be planarly and uniformly polished without giving rise to problems of over-polishing such as dishing or erosion.


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