The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 09, 2003

Filed:

Dec. 21, 2001
Applicant:
Inventors:

Sang-Ho Yu, Sunnyvale, CA (US);

Yonghwa Chris Cha, San Jose, CA (US);

Murali Abburi, Santa Clara, CA (US);

Shri Singhvi, Milpitas, CA (US);

Fufa Chen, Cupertino, CA (US);

Assignee:

Applied Materials, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
C25C 1/434 ; C25C 1/600 ; B05C 1/100 ;
U.S. Cl.
CPC ...
C25C 1/434 ; C25C 1/600 ; B05C 1/100 ;
Abstract

A semiconductor metallization process for providing complete via fill on a substrate, free of voids, and a planar metal surface, free of grooves. In one aspect, a refractory layer is deposited onto a substrate having high aspect ratio contacts or vias formed thereon. A conformal PVD metal layer, such as Al or Cu, is then deposited onto the refractory layer at a pressure below about 1 milliTorr. The vias and/or contacts are then filled with metal, such as by reflowing additional metal deposited by physical vapor deposition on the conformal PVD metal layer. The process is preferably performed in an integrated processing system that includes a long throw PVD chamber, wherein a target and a substrate are separated by at least 100 mm, and a hot metal PVD chamber, also serving as a reflow chamber.


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