Circuits for a low swing clocking scheme

Abstract

In a clocking network with clock distribution in the gigahertz frequencies, low voltage swings are generated and applied instead of full voltage swings. The low voltage swing circuits are differential low voltage swing circuits. True and complement signals are transmitted in the global path, enabling cancellation of common mode noise picked up along the path from the generation point to the destination local ends, where the noise is subtracted from the signals. The low voltage swing circuits include a differential translator/driver, differential repeaters and differential receivers/translators to enable centrally generated low voltage swing clock signals to be distributed throughout the chip and to be faithfully converted to full voltage swing clock signals at the local ends. The input sections of the translator/driver convert a full voltage swing clock signal to a differential pair of low voltage swing clock signals, the differential repeaters are provided to repeat the low voltage swing clock signals to cover the paths up to the respective differential receivers/translators, and the differential receivers/translators convert the low voltage swing clock signals to full voltage swing clock signals.