The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 18, 2003

Filed:

Mar. 15, 2001
Applicant:
Inventors:

Jeffrey J. Peterson, Folsom, CA (US);

David M. Dixon, Placerville, CA (US);

Dow Ping D. Wong, Folsom, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ; G06F 1/500 ; G06F 1/718 ;
U.S. Cl.
CPC ...
G06F / ; G06F 1/500 ; G06F 1/718 ;
Abstract

Programming a reference voltage in a reference cell of a charge-based memory to a level that will maximize the predicted operational life of the memory, based on the application-specific predicted usage profile of the memory and the effects of that usage profile on the leakage curves of the various memory states. The different states of a memory cell may have different leakage rates, based on operational and environmental considerations, causing the cell to fail prematurely in one state, while having significant remaining life in the other state(s). The operational life of the memory can be increased by adjusting the reference threshold voltage so that the faster-leaking sate will last longer before failure occurs. Maximum operational life can be achieved by setting the reference voltage to maximize the predicted time-to-failure of the state with the shortest predicted time-to-failure.


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