The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 11, 2003
Filed:
Nov. 24, 1999
Kazuyuki Maruo, Tokyo, JP;
Tadashi Shibata, Tokyo, JP;
Advantest Corporation, Tokyo, JP;
Abstract
A sum of product circuit ( ) which adds up two input voltages, each of which is multiplied by the prescribed coefficients. The sum of product circuit ( ) has a &ngr; MOS transistor ( ), a first and a second capacitance (C , C ), and an output terminal ( ). The &ngr; MOS transistor ( ) includes a drain ( ), source ( ), and a floating gate ( ). The first and a second capacitance (C , C ) connects each of two input voltages to the floating gate ( ) by capacity coupling. The output terminal ( ) outputs a voltage realized between a resister element (R ) and the &ngr; MOS transistor ( ). A constant voltage is applied between the drain ( ) and the source ( ) through the resister element (R ).