The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 28, 2003
Filed:
Jun. 15, 1999
Jacques Meyer, Corenc, FR;
STMicroelectronics S.A., Gentilly, FR;
Abstract
A method for detecting the lock-in of a loop that synchronizes an internal clock on the transmission of value pairs provided by a demodulator. According to the method, a module of a vector that has as components the values of one of the value pairs is calculated, and the module is compared with a threshold that is smaller than a theoretical module. The locked-in condition is determined according to the ratio of the number of modules found to be greater than or smaller than the threshold to the total number of modules. In one preferred method, the threshold is incremented by a first value if the module is greater than the threshold and is decremented by a second value if the module is less than the threshold. A lock-in detection circuit for detecting the lock-in of a loop is also provided. A calculation circuit calculates a module of a vector that has as components the values of one of the value pairs. A register stores a threshold and a comparator compares the stored threshold with the calculated module. A modification circuit modifies the stored threshold based on the comparison result, and an analysis circuit analyzes the stored threshold to determine the locked-in condition.