The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 07, 2003
Filed:
Dec. 31, 1997
Applicant:
Inventor:
Xia Dai, Santa Clara, CA (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
G06F 7/50 ;
U.S. Cl.
CPC ...
G06F 7/50 ;
Abstract
One embodiment of the present invention, an eight bit binary adder with a typical latency independent of its width, is described. The adder comprises a four bit adder for calculating bits S -S of the sum, plus four bitslice circuits, one for speculatively calculating each of bits S -S of the sum. The calculation of the carry bit out of each bitslice is limited to the operands bits into that bitslice and the three preceding bitslices. Each bitslice also includes circuitry for detecting a potential error in the speculative sum such that the speculative sum can be corrected when there is a potential error.