Geometric engine including a computational module for use in a video graphics controller

Abstract

A computation module and/or geometric engine for use in a video graphics processing circuit includes memory, a computation engine, a plurality of thread controllers, and an arbitration module. The computation engine is operably coupled to perform an operation based on an operation code and to provide a corresponding result to the memory as indicated by the operation code. Each of the plurality of thread controllers manages at least one corresponding thread of a plurality of threads. The plurality of threads constitutes an application. The arbitration module is coupled to the plurality of thread controllers and utilizes an application specific prioritization scheme to provide operation codes from the plurality of thread controllers to the computation engine such that idle time of the computation engine is minimized. The prioritization scheme prioritizes certain threads over other threads such that the throughput through the computation module is maximized.