The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 30, 2003

Filed:

Mar. 24, 2000
Applicant:
Inventor:

William D. Elliott, Sunnyvale, CA (US);

Assignee:

STMicroelectronics, Inc., Carrollton, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 5/00 ;
U.S. Cl.
CPC ...
G09G 5/00 ;
Abstract

A system includes an integrated circuit device that compares the relative phase of first and second signals to a very high precision. The system includes a first input for receiving the first signal with a first edge, and a second input for receiving the second signal with a second edge. A first delay chain includes a first at least one delay element, and the first signal is delayed across the first at least one delay element, each of the first at least one delay element includes an output tap. A second delay chain includes a second at least one delay element, the second signal is delayed across the second at least one delay element, each of the second at least one delay element includes an output tap. At least one symmetrical Flip-Flop includes a first and second input electrically coupled to an output tap of each of the first and second at least one delay element, respectively, such that an output of each of the at least one Flip-Flop indicates which of the first and second edge arrived first at the respective first and second input of the at least one Flip-Flop.


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