The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 23, 2003

Filed:

Apr. 26, 2000
Applicant:
Inventor:

Renaud Ayrignac, Grenoble, FR;

Assignee:

STMicroelectronics SA, Gentilly, FR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 3/128 ; G06F 1/02 ;
U.S. Cl.
CPC ...
G01R 3/128 ; G06F 1/02 ;
Abstract

A method and device for collecting logic values output from a logic unit having n inputs and p outputs included within an electronic circuit is provided by p test cells. These test cells are connected in parallel respectively to the p outputs of the logic unit such that the logic values of the outputs of the logic unit are loaded into the test cells in a normal mode, and are connected in series with each other to form a shift register for propagating logic values of the outputs of the logic unit to a collecting node in a test mode. In a first phase, the logic values of one out of two outputs of the logic unit are propagated to the shift register. Then, in a second phase, the logic values of the other outputs of the logic unit are propagated in the shift register. The logic values of the outputs of the logic unit are reloaded in the test cells between the first and second phase.


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