The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 23, 2003
Filed:
Mar. 08, 2002
Steven L. Haehn, Ft. Collins, CO (US);
Christopher D. Macchietto, Ft. Collins, CO (US);
Mitchel E. Lohr, Windsor, CO (US);
LSI Logic Corporation, Milpitas, CA (US);
Abstract
A method and a means for determining an I test limit of an integrated circuit are provided. In particular, a method is provided which includes measuring the I value of a test structure formed upon a die derived from the same lot of wafers as an integrated circuit. The method may further include setting the I test limit based upon the measured I value. In some embodiments, setting the I test limit may include correlating the I value of the test structure to calibration data. Accordingly, a means for conducting such a method may include one or more test structures formed upon a die and calibration data adapted to correlate a test structure I value to an I test limit of an integrated circuit. In some cases, the means for determining the I test limit may further include a means for increasing a substrate leakage current of the test structure.