The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 16, 2003

Filed:

Aug. 29, 2001
Applicant:
Inventors:

Katsuhito Kikuma, Kawasaki, JP;

Mitsutaka Ikeda, Kawasaki, JP;

Yoshihiro Tsukidate, Kawasaki, JP;

Yuji Akashi, Kasugai, JP;

Kaname Ozawa, Kawasaki, JP;

Akira Takashima, Kawasaki, JP;

Tadashi Uno, Kawasaki, JP;

Takao Nishimura, Kawasaki, JP;

Fumihiko Ando, Kawasaki, JP;

Hiroshi Onodera, Shibata, JP;

Hayato Okuda, Shibata, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/358 ; H01L 2/348 ; H01L 2/329 ;
U.S. Cl.
CPC ...
H01L 2/358 ; H01L 2/348 ; H01L 2/329 ;
Abstract

In a stacked semiconductor device which has a plurality of semiconductor chips of desired sizes stacked as one package, a first semiconductor chip is mounted on a flexible printed wiring board provided with external connecting terminals. A printed circuit board is placed and mounted on the first semiconductor chip by flip-chip bonding. A second semiconductor chip is secured onto the printed circuit board. The second semiconductor chip is connected to the flexible printed wiring board by wire bonding. The first semiconductor chip is connected to the flexible printed wiring board by wire bonding via the printed circuit board.


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