The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 09, 2003
Filed:
Apr. 04, 2002
Applicant:
Inventor:
Hung-Kwei Hu, Saratoga, CA (US);
Assignee:
Applied Materials, Inc, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/1336 ;
U.S. Cl.
CPC ...
H01L 2/1336 ;
Abstract
Methods for use in fabricating integrated circuit structures. One embodiment of the present invention is a quasi-damascene gate, self-aligned source/drain method for forming a device on a substrate that includes steps of: (a) forming a gate dielectric layer over the substrate; (b) forming a first gate electrode layer over the gate dielectric layer; (c) forming a contact etch stop layer over the first gate electrode layer; (d) forming a self-aligning layer over the contact etch stop layer; and (e) forming and patterning a mask over the self-aligning layer.