The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 09, 2003
Filed:
Mar. 08, 2001
Boon Siew Ooi, Penang, MY;
Yee Loy Lam, Singapore, SG;
Yuen Chuen Chan, Singapore, SG;
Yan Zhou, Singapore, SG;
Siu Chung Tam, Singapore, SG;
NTU Ventures PTE Ltd, Singapore, SG;
Abstract
The present invention provides a novel technique based on gray scale mask patterning ( ), which requires only a single lithography and etching step ( ) to produce different thickness of SiO implantation mask ( ) in selected regions followed by a one step IID ( ) to achieve selective area intermixing. This novel, low cost, and simple technique can be applied for the fabrication of PICs in general, and WDM sources in particular. By applying a gray scale mask technique in IID in accordance with the present invention, the bandgap energy of a QW material can be tuned to different degrees across a wafer ( ). This enables not only the integration of monolithic multiple-wavelength lasers but further extends to integrate with modulators and couplers on a single chip. This technique can also be applied to ease the fabrication and design process of superluminescent diodes (SLDs) by expanding the gain spectrum to a maximum after epitaxial growth.