The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 02, 2003

Filed:

Oct. 19, 2000
Applicant:
Inventors:

Nicole Herbots, Tempe, AZ (US);

Vasudeva P. Atluri, Scottsdale, AZ (US);

James D. Bradley, Gilbert, AZ (US);

Banerjee Swati, Chandler, AZ (US);

Quinton B. Hurst, Tempe, AZ (US);

Jiong Xiang, Tempe, AZ (US);

Assignee:

Arizona Board of Regents, Phoenix, AZ (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/1311 ; H01L 2/131 ;
U.S. Cl.
CPC ...
H01L 2/1311 ; H01L 2/131 ;
Abstract

A semiconductor processing method capable of producing highly ordered, ultra thin dielectrics, including gate oxide and other semiconductor dielectrics, and interphase phases with low defect density. The process includes a degrease step, an etch, primary oxidation and then a passivation step which utilizes hydrofluoric acid to passivate the cleaned silicon surface with hydrogen. Dielectric layers may then be formed with low interface defect density, low flat band voltages and low fixed charge on semiconductor substrates.


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