The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 19, 2003

Filed:

Nov. 06, 2000
Applicant:
Inventors:

Kwang-Youl Chun, Sungnam, KR;

Yun-Jae Lee, Seoul, KR;

Won-Seong Lee, Seoul, KR;

Jeong-Hoon Oh, Seoul, KR;

Kyu-Hyun Lee, Suwon, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/1461 ;
U.S. Cl.
CPC ...
H01L 2/1461 ;
Abstract

The present invention provides a method of eliminating or covering a defect source in a wafer edge region for semiconductor fabrication. During the etching process of a sacrificial oxide layer for storage node openings, the sacrificial oxide layer has a rumple topology in the wafer edge region due to etching non-uniformity of a photoresist layer formed on the sacrificial oxide layer. Subsequent deposition of a conductive layer and planarization etching, the conductive layer undesirably remains at the wafer edge region as a defect source. Such conductive contaminant particles dislodge, causing many problems in the wafer main region. The present invention removes such a defect source via two methods. One is to directly remove the defect source using a photoresist pattern exposing thereof. The other is to fix the defect source in place in the wafer edge region by protecting thereof by a photoresist pattern during subsequent cleaning processes.


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