Methods of fabricating cylinder-type capacitors for semiconductor devices using a hard mask and a mold layer

Abstract

A capacitor for a semiconductor memory device is fabricated by forming a mold layer on a semiconductor substrate that includes a peripheral circuit area and a cell array area which includes a plug in a buried contact hole. A hard mask layer pattern is formed on the mold layer. The mold layer is etched, using the hard mask layer pattern as an etch mask, to form a mold layer pattern. The hard mask layer pattern is then removed from the mold layer pattern or only partially etched back on the mold layer pattern. A capacitor lower electrode is formed along the walls of the buried contact hole and on a surface of the mold layer pattern. A capacitor dielectric layer is formed on the capacitor lower electrode and a capacitor upper electrode is formed on the capacitor dielectric layer.