The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 12, 2003
Filed:
May. 28, 2002
Henning Max Hansen, Sønderborg, DK;
Frands Wulff Voss, Sønderborg, DK;
Niels Per Mondrup, Augustenborg, DK;
Karsten Westermann, Sønderborg, DK;
Hans Jørgen Moos, Nordborg, DK;
James D. Collier, Ely, GB;
Roger F. Sewell, Cambs, GB;
Richard-Jan E. Jansen, HK Leiden, NL;
Danfoss A/S, Nordborg, DK;
Abstract
In a circuit arrangement for deriving the measured variable from the signals (S to S ) of at least two sensors ( ) of a flow meter, which flow meter comprises one or several parallel fluid lines ( ) and means ( ) for exciting oscillations of a predetermined fundamental frequency (&ohgr;) in the fluid line(s), the sensors ( ) detect the oscillations and the sensor signals (S to S ) are supplied by way of a respective A-D converter ( ) to a digital processing unit (P) having a computation circuit ( ), in which their phase difference (&PHgr;) is determined as a measure of the flow. In order to be largely independent of unwanted changes in the fundamental frequency (&ohgr;) of the sensor signals (S , S ), and to measure the flow with little effort and with as few errors as possible, provision is made for the processing unit (P) between the A-D converter ( ) of each sensor signal (S , S ) and the computation circuit ( ) to comprise a digital multiplier circuit (M) and a digital filter arrangement (F) downstream thereof, for the digital sensor signals (S , S ) to be multiplied in the multiplier circuit (M) with respective digital signals (I, R) phase-displaced by 90° with respect to one another that represent sinusoidal oscillations of identical maximum amplitude (x) and of a frequency (&ohgr;+&Dgr;&ohgr;) that varies by a slight difference frequency (&Dgr;&ohgr;) from the fundamental frequency (&ohgr;), and for the pass band of the filter arrangement (F) to be matched to the difference frequency (&Dgr;&ohgr;).