The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 12, 2003
Filed:
Jun. 05, 2001
Applicant:
Inventor:
Joseph F. Ahadian, Carlsbad, CA (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 1/36 ;
U.S. Cl.
CPC ...
H03F 1/36 ;
Abstract
A system of connecting errors in the control loop using multiple additional loops. A first loop carries out control in a desired way, and the additional loops are provided for the purpose of determining a specified error value. That specified error value may be, for example, a quiescent current. The specified error value is then used to correct for errors in the first loop.
Quick Actions:
Ahadian, Joseph. (2003). Offset error in linear feedback loops corrected by loop replication (U.S. Patent No. 6605992). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6605992
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