The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 12, 2003

Filed:

Jan. 02, 2002
Applicant:
Inventors:

Ravi P. Annavajjhala, Folsom, CA (US);

Mary Frances Therese B. Yuvienco, Las Pinas, PH;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05F 3/08 ;
U.S. Cl.
CPC ...
G05F 3/08 ;
Abstract

Circuits reduce the ripple in charge pump output by staggering the times at which charge is drawn from the pump. In one embodiment, the outputs of a two-array high current pump are staggered by multiplexing two pairs of clock inputs, the second pair being 180 degrees out of phase with the first clock input pair. When an EEPROM is in a programming or erase algorithm, multiplexers switch the clock inputs to the second array, effectively inverting the input clock signals. After switching, the output from the second array is 180 degrees out of phase with the output from the first array. The peak-to-peak ripple in the charge pump output is thereby reduced to about 400 mV or less.


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