The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 12, 2003

Filed:

May. 10, 2002
Applicant:
Inventors:

Heon Lee, Sunnyvale, CA (US);

Dennis Lazaroff, Corvallis, OR (US);

Neal Meyer, Corvallis, OR (US);

Jim Ellenson, Corvallis, OR (US);

Ken Kramer, Corvallis, OR (US);

Kurt Ulmer, Corvallis, OR (US);

David Pursalan, Corvallis, OR (US);

Peter Fricke, Corvallis, OR (US);

Andrew Koll, Albany, OR (US);

Andy Van Brockin, Corvallis, OR (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/902 ;
U.S. Cl.
CPC ...
H01L 2/902 ;
Abstract

The invention includes an electronic memory structure. The electronic memory structure includes a substrate. A substantially planar first conductor is formed adjacent to the substrate. An interconnection layer is formed adjacent to the first conductor. A phase change material element is formed adjacent to the interconnection layer. The interconnection layer includes a conductive interconnect structure extending from the first conductor to the phase change material element. The interconnect structure includes a first surface physically connected to the first conductor. The interconnect structure further includes a second surface attached to the phase change material element. The second surface area of the second surface is substantially smaller than a first surface area of the first surface. A substantially planar second conductor is formed adjacent to the phase change material element.


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