Facilitating an adjustable level of phase shifting during an optical lithography process for manufacturing an integrated circuit

Abstract

One embodiment of the invention provides a method that facilitates selectively varying how much of a layout of an integrated circuit is defined by phase shifters during an optical lithography process used in manufacturing the integrated circuit. During operation, the method receives a specification of the layout of the integrated circuit. The method then assigns features within the layout to zones associated with different phase shifting priorities. Next, the method generates a phase shifter placement by placing phase shifters comprised of phase shifting geometries onto a phase shifting mask to define the features within the layout, wherein the phase shifter placement is subject to coloring constraints. Note that in general there is no restriction on the order of zone placement. During this placement process, if coloring constraints cannot be satisfied, the method resolves conflicts and/or removes features from being phase-shifted based upon phase shifting priorities of the zones.