The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 22, 2003

Filed:

Oct. 17, 2000
Applicant:
Inventor:

Masayuki Sasaki, Nagano, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 1/18 ; H05K 1/11 ; H05K 1/00 ;
U.S. Cl.
CPC ...
H05K 1/18 ; H05K 1/11 ; H05K 1/00 ;
Abstract

A multi-layer circuit board comprises: an insulating layer having upper and lower surfaces thereof, and wiring patterns arranged on the upper and lower surfaces of the insulating layer. A ferroelectric layer has a dieletric constant larger than that of the insulating layer and has upper and lower surfaces. The ferroelectric layer is arranged in the insulating layer in such a manner that the upper and lower surfaces of the ferroelectric layer coincide with the upper and lower surfaces of the insulating layer, respectively. A pair of electrode films are formed on the upper and lower surfaces of the ferroelectric layer, respectively, to define a capacitor incorporated in the multi-layer circuit board.


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Sasaki, Masayuki. (2003). Multilayer circuit board having a capacitor and process for manufacturing same (U.S. Patent No. 6597583). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6597583

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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