The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 22, 2003
Filed:
Aug. 05, 2002
Che-yu Li, Ithaca, NY (US);
Sharon L. Moriarty, Mountain View, CA (US);
High Connection Density, Inc., Sunnyvale, CA (US);
Abstract
The present invention is a family of memory modules. In one embodiment a memory module with granularity, upgradeability, and high throughput of at least 4.2 gigabytes per second using two channels of RAMBUS memory devices in a typical volume of just 2.2 inches by 1.1 inches by 0.39 inch. Each module includes an impedance-controlled substrate having contact pads, memory devices and other components, including optional driver line terminators, on its surfaces. The inclusion of spaced, multiple area array interconnections allows a row of memory devices to be serially mounted between each of the area array interconnections, thereby minimizing the interconnect lengths and facilitating matching of interconnect lengths. Short area array interconnections, including BGA, PGA, and LGA options or interchangeable alternative connectors provide interconnections between the modules and the rest of the system. Thermal control structures may be included to maintain the memory devices within a reliable range of operating temperatures.