The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 08, 2003

Filed:

Jun. 22, 1999
Applicant:
Inventors:

Mike Briner, San Jose, CA (US);

David Sweetman, Milpitas, CA (US);

Tam Nguyen, San Jose, CA (US);

Assignee:

Silicon Storage Technology, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/200 ;
U.S. Cl.
CPC ...
G06F 1/200 ;
Abstract

A flash memory comprises an address bus, a data bus, control lines, and an array of addressable nonvolatile memory cells, connected to the address bus and the data bus. A latch, activated by control signals, stores signals supplied from the address bus or the data bus. A decoder decodes the signal stored in the latch, and in response to a first signal decoded for partitioning the array of memory cells into a plurality of first sectors each having a first size, and in response to a second signal decoded for partitioning the array of memory cells into a plurality of second sectors each of a second size, different from the first size. A control circuitry controls the erasure of a first or a second sector of the memory array in response to the first or second signal decoded.


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