The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 08, 2003
Filed:
May. 03, 2001
Applicant:
Inventors:
Chitranjan N. Reddy, Los Alto Hills, CA (US);
Ritu Shrivastava, Fremont, CA (US);
Assignee:
Alliance Semiconductor Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/18238 ; H01L 2/18242 ; H01L 2/176 ;
U.S. Cl.
CPC ...
H01L 2/18238 ; H01L 2/18242 ; H01L 2/176 ;
Abstract
The dynamic random access memory (DRAM) cells in a semiconductor chip are isolated from the peripheral circuitry by forming the DRAM cells directly in the substrate while the peripheral and other functional circuits are formed in wells that are isolated from the substrate. In addition to providing isolation, the placement of the DRAM cells also reduces the leakage current in the cells, thereby increasing the time that a DRAM cell can hold a charge without being refreshed.