Electrically erasable and programmable nonvolatile semiconductor memory with automatic write-verify controller

Abstract

A method for controlling programming of an electrically erasable and programmable nonvolatile memory having a plurality of memory cells, row and column decoders, an address buffer, and a bit line controller including a sense/latch circuit and a data I/O buffer, including supplying address signals to the address buffer to define at least one selected memory cell in the plurality of memory cells; supplying to the bit line controller programming data which corresponds to write data to be written in the selected memory cell; latching the programming data in the sense/latch circuit; writing the write data into the selected memory cell; reading the written data of the selected memory cell and verifying whether or not the data is successfully written; performing a logic operation with respect to the read data and the programming data latched in the sense/latch circuit to determine if the written memory cell is insufficiently written or successfully written; and if an insufficiently written memory cell is found, maintaining the programming data and rewriting the write data into the insufficiently written memory cell.